Dean Liu
		Contact Information Addr: Gates Hall #507, Stanford CA, 94305 Tel: (650) 725-4955 Fax: (650) 725-6949 Email: dliu@vlsi.stanford.edu

Personal Background

I am a sixth year EE Ph.D. student at Stanford University. As a member of the VLSI Research Group, I am learning different aspects of VLSI systems under the guidance of Prof. Horowitz. Besides working on course work and doing research, I serve as a CSL Bureaucrat - a student representative for the Computer Systems Lab. And to "increase" productivity, I also play golf!

Research Interests

• Design reusability and validation methodology
• Clock synthesis/recovery circuits (PLL and DLL)
• Low-power high-speed I/O links
• Clock skew analysis and de-skewing circuits
• High performance digital circuit design
• Computer-aided design algorithms: static timing analysis and physical design automation

Interesting Links

• Course Work - classes that I've taken at Stanford
• Chip Gallery - IC's that I've built
• Bibliography - readings that keep you up all night ...
• Resume - a list of my publications and work experience